1. Field of the Invention
The present invention relates to a method and an apparatus for active power factor correction (PFC), i.e. by means of a switch clocked actively by a PFC control unit.
The technical field of the present invention is in particular that of power factor correction in AC/DC voltage power converters.
2. Related Technology
Power factor correction is used to influence the manner in which electrical appliances draw current from the power supply system. The AC mains voltage has a sinusoidal time profile, as is known. Ideally, therefore, the current drawn from the mains should also likewise have a sinusoidal time profile. This ideal case does not always arise, however, with it even being possible for the current to deviate considerably from a sinusoidal envelope. If the current drawn is not sinusoidal, harmonics are produced in the mains current, however. These harmonic currents in the supply system should be reduced with the aid of a power factor correction circuit.
DE 10 2004 025 597 A1 has disclosed a circuit for power factor correction, in which the inductor is charged and discharged repeatedly by means of a switch clocked by a PFC control unit by virtue of said switch closing and opening, and in which the discharging current of the inductor is supplied to the output of the converter via a diode (D). The PFC control unit in the form of an ASIC has only two pins. Control signals are output via one of the pins and parameters which are required for dimensioning the switch-on and switch-off time for the switch are monitored at the other pin. In this case, the switch is switched on again at the end of a switch-off time when the discharging current through the inductor has reached the zero line. This time is determined by monitoring the voltage on the high-potential side of the switch and is measured by means of a voltage divider, which is connected in parallel with the switch. The tap of the voltage divider forms a monitoring point, to be precise the only monitoring point, with said monitoring point being connected to the monitoring pin. The monitored voltage has a downwardly inflected time profile when the discharging current reaches the zero line. This event will be referred to below as a ZCD event (zero crossing detection).
In the known method and the known circuit, therefore, the DC output voltage can be monitored via the monitoring point when the switch is open. The DC output voltage can only be monitored as long as there is still current flowing through the diode, however. When the AC input voltage, i.e. the rectified and, as far as possible, smoothed mains voltage, which still comprises successive sinusoidal half-cycles of the same polarity, however, has a relatively low mean amplitude value, or when the load is low, the time segment within which the diode is conducting can be very short, with the result that the DC output voltage can only be sampled to an insufficient extent.
Circuits for power factor correction of the type under consideration here are normally regulated by virtue of the switch-on time TON being altered. Given a predetermined load, TON is theoretically constant over the entire angular range of 90 degrees of a mains half-cycle. However, when the load is reduced, TON also needs to be reduced correspondingly. Even when the DC output voltage VBUS is monitored directly, the control range is restricted as a result of the abovementioned temporally very short sampling pulses. Under such low-load conditions, the procedure which has therefore been adopted in the meantime is that the power correction circuit has been switched off entirely when VBUS exceeds an upper voltage threshold and switched on again when VBUS exceeds a lower voltage threshold. With such hysteresis regulation, however, the desired sinusoidal form of the input current can be maintained.